*/
#include <lib/mmio.h>
+#include "ulcb_cpld.h"
#define SCLK 8 /* GP_6_8 */
#define SSTBZ 3 /* GP_2_3 */
--- /dev/null
+/*
+ * Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef RCAR_ULCB_CPLD_H__
+#define RCAR_ULCB_CPLD_H__
+
+extern void rcar_cpld_reset_cpu(void);
+
+#endif /* RCAR_ULCB_CPLD_H__ */
#include "pwrc.h"
#include "rcar_def.h"
#include "rcar_private.h"
+#include "ulcb_cpld.h"
#define DVFS_SET_VID_0V (0x00)
#define P_ALL_OFF (0x80)
extern void plat_rcar_gic_init(void);
extern u_register_t rcar_boot_mpidr;
-#if (RCAR_GEN3_ULCB == 1)
-extern void rcar_cpld_reset_cpu(void);
-#endif
-
static uintptr_t rcar_sec_entrypoint;
static void rcar_program_mailbox(uint64_t mpidr, uint64_t address)
-Idrivers/staging/renesas/rcar/qos \
-Idrivers/renesas/rcar/iic_dvfs \
-Idrivers/renesas/rcar/board \
+ -Idrivers/renesas/rcar/cpld/ \
-Idrivers/renesas/rcar/avs \
-Idrivers/renesas/rcar/delay \
-Idrivers/renesas/rcar/rom \